The 34th IEEE Asian Test Symposium (ATS) and the 9th International Test Conference in Asia (ITC-Asia) were held jointly in Tokyo, Japan, co-located with SEMICON Japan 2025. The event brought together academic researchers and industry experts from around the world to exchange ideas and present recent advances in system-, board-, and device-level testing, as well as intelligent and data-driven test methodologies.
The GS-IMTR was prominently represented through a dedicated special session titled “6 Years of Graduate School Intelligent Methods Test and Reliability”. Embedded within the broader ATS and ITC-Asia program, the session highlighted key research directions and achievements of GS-IMTR, emphasizing the close interaction between academia and industry in addressing current and future challenges in semiconductor testing and reliability.
The special session featured an invited industry keynote by Kotaro Hasegawa (Senior Vice President, Advantest Japan), who shared insights into the future of the semiconductor industry. This was followed by research presentations from GS-IMTR doctoral researchers, including Tim Strobel, Yang Yang, Anand Venkatachalam, and Thorben Schey. Their talks covered topics such as intelligent sensing and on-chip learning, interpretable data analytics, analytics-driven tester calibration, and adaptive real-time decision-making in mixed-signal testing.
Beyond the special session, GS-IMTR members also contributed to the regular technical program at ATS. Thorben Schey presented work on uncertainty-guided live measurement sequencing for fast and robust SAR ADC linearity testing. Denis Schwachhofer presented research exploring the limits of large language models for system-level test program generation.
Overall, the joint ATS and ITC-Asia event provided an excellent platform for GS-IMTR to showcase its research, strengthen international visibility, and engage with leading experts from academia and industry.
